1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and an apparatus for manufacturing a semiconductor device, more specifically to a method of manufacturing a semiconductor device and an apparatus for manufacturing a semiconductor device including a process of removing a film of a semiconductor device by plasma dry etching.
2. Description of the Related Art
In compliance with the recent increasing demand for a higher integration of a semiconductor device, copper has come to be widely used as a material for an interconnect or a plug. Copper has the advantage of lower resistance and higher electromigration resistance than aluminum, which has been conventionally used.
On the other hand, copper is known to rapidly diffuse throughout an insulating film constituted of a silicon compound or the like. Accordingly, in case of employing copper as an interconnect material, usually a barrier metal layer and a diffusion barrier are provided, to respectively cover a lateral and a lower face and an upper face of the copper interconnect. Up to now SiN and so on have been popularly used as the diffusion barrier, however lately SiCN or the like having a low dielectric constant has come to be more widely used from the viewpoint of reducing crosstalk between interconnect lines (JP-A laid open 2002-319619, claim 5, Paragraph 0029). Also, the diffusion barrier also serves as an etch-stopper film when performing an etching process on an upper film.
However, despite utilizing such etch-stopper film it has been difficult to significantly improve production efficiency. FIGS. 12A to 12C are schematic cross-sectional views showing a process of removing by etching an interlayer insulating film 4 and an etch-stopper film 3 in a semiconductor device constituted of a first insulating film 1 in which a copper interconnect 2 is located, the etch-stopper film 3, the interlayer insulating film 4 and a resist film 5 layered in this sequence.
During a depositing process or a preliminary stage anterior to an etching process such as a CMP (chemical mechanical polishing) process of such a semiconductor device, a thickness of the interlayer insulating film 4 often varies depending on a depositing condition or a type of processing apparatus. Accordingly FIG. 12A represents a case where the interlayer insulating film 4 is relatively thin; FIG. 12B a case where the interlayer insulating film 4 has a normal thickness; and FIG. 12C a case where the interlayer insulating film 4 is too thick. Conventionally an etching process of the interlayer insulating film 4 and the etch-stopper film 3 has been performed for a predetermined fixed duration of time. In case where a duration of the etching process is fixed based on the semiconductor device shown in FIG. 12B, in the semiconductor device of FIG. 12A which has the thin interlayer insulating film 4 even the etch-stopper film 3 is removed during the etching process of the interlayer insulating film 4, so that penetration of the SiCN film is caused. This leads to oxidation of a surface of the copper interconnect 2 in the etching process of the interlayer insulating film 4 or removing process of the resist film 5. An oxide thus produced incurs an increase of contact resistance or interconnect resistance. Even though the oxide can be removed by a wet etching process, the copper interconnect 2 suffers a loss of its mass. On the other hand, in case where the interlayer insulating film 4 is excessively thick as shown in FIG. 12C, the interlayer insulating film 4 is not sufficiently removed during the etching process thereof, and a residue remains. Therefore even after a subsequent etching process of the etch-stopper film 3, a residue thereof remains.
Besides, even though a constant film thickness is maintained, an etching performance may result excessive or insufficient depending on influence of a fluctuation in etching rate of the etching apparatus. As a result, a decline of yield due to the residue or dispersion of electric characteristics due to inconstant etching depth is incurred, thereby decreasing reliability of the semiconductor device.
Further, a via hole diameter etc. may vary depending on a depositing condition or an apparatus. When the via hole diameter is inconstant, plasma density in the via hole fluctuates during a plasma dry etching process thereby causing a partial deviation of etching rate, which leads to the same problem of excessive etching or etching residue.
For the purpose of solving such problems, U.S. Pat. No. 6,376,262 discloses a technique of stopping an etching at a point where luminous intensity of 387 nm decreases when removing by etching a nitride film formed on a TEOS (tetraethylorthosilicate) film. This technique can reduce possibility of an excessive etching that may be caused by a difference of a film thickens or etching apparatus characteristics.
However, in case where an SiCN film or an SiON film is used as an etch-stopper film, the luminous intensity at the wave length of 387 nm during the etching originating from N declines because of a low nitrogen density in such films. Therefore, a sufficient luminous intensity for detection may not be obtained by an endpoint detection at a single wavelength. Also, even when an SiN film is used as the etch-stopper film, it is still difficult to precisely determine an endpoint by detection at a single wavelength alone. Furthermore since aluminous intensity peak based on CO is located around 387 nm, it is difficult to capture a change of luminous intensity originating from N by detection based only on the luminous intensity of 387 nm.